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| FPGA Trainer (Technical know-how from IIT, Delhi) | VPL-FPGA-I |
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| FEATURES |
- Field Programmable Gate Array Trainer commonly known as FPGA Trainer uses industrial standard Xilinx FPGA 3142
- It has level microcontroller 8051 family processor to enable it to upload and download program to/from FPGA.
- It has a serial link which enables user to communicate with PC at a standard baud rate.
- User can develop the circuit/schematic using Xilinx standard Foundation Series Software.
- It has Software to enable user to Download Program, Upload Program, Run Program, Upload Data from RAM into a file, Download Data from a file onto the RAM, Register Setting, Download Configuration, Download FPGA data, Download FPGA Data from a file, Upload FPGA Data, Upload FPGA Data to file, Diagnostic Mode, Settings etc.
- It has I/O counter interface to enable it to connect to various demo modules. This helps in man to machine interface.
- System has 64K byte of EPROM & 32K byte of RAM.
- All the pin outs of FPGA are available on the board. This helps in man - machine interface.
| SPECIFICATIONS |
- Supported chip: Xilinx 3142 on board experiments.
- Logic input switch:
- 8 x 1 logic input original press point with light
- 8 x 2 logic input Dip switch
- Output unit:
- 2 x 3 seven segment display
- 12 x 1 LED display to perform traffic light experiment
- Linear unit:
- 1 set 8 bit D/A converter
- 1 set 8 bit A/D converter
- Library Components:
In order to facilitate a smooth operation for the user who wish directly go ahead with their designs(without wanting to go in more detailed aspects of periphral devices) software module of almost all peripheral deviceshave been added as library components. These are: Bounce Eliminator, PC Interfacing Module (PC Input/Output), PC Interfacing Module (PC RAM), Up-down Counter, Sequential Divider, First in First out Buffer (FIFO), Hamming Distance Calculator, Incrementor, Last in First Out Buffer(LIFO), DAC Interface, ADC Interface, 8 x 8 LED Matrix, Seven Segment etc.
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